Eng 2013: Op Amp Theory

Theory For Electronics Lab FEE 481

Title : THE OPERATIONAL AMPLIFIER

As long as op amps are operated at moderated frequencies and moderate dc gains there is generally a remarkable agreement between actual behaviour and behaviour predicted by the ideal op amp model. Increasing frequency or gain, however is accompanied by a progressive degradation in performance because various limitations come into play.

One of the most serious limitations is the fact that the open-loop gain is high only from dc up to a few hertz, and it decreased with frequency thereafter, causing a progressive degradation in closed-loop performance. A related drawback is the fact that there is a limit to how fast an op amp can respond to sudden changes at the input.

Even if the operating frequencies are kept suitably low, other limitations come into play. Generally designated as input-referred errors, they are particularly noticeable in high-dc-gain applications. The most common ones are the input bias current I_B, the input offset current I_OS, the input offset voltage V_OS, and the ac noise densities e_n and i_n.

This experiment examines the first three in addition to slew-rate distortion and bandwidth limitations.

INPUT BIAS AND OFFSET CURRENTS

Practical op amps do draw small currents at their input pins. The 741 input stage reveals that I_P and I_N are the base currents needed to bias Q₁ and Q₂ in the forward-active region. I_P and I_N flow into the op amp if its input transistors are npn BJTs or p-channel JFETs, and out of the op amp for pnp BJTs or n-channel JFETs.

Because of unavoidable mismatches between the two halves of the input stage, particularly between the β_Fs of Q₁ and Q₂. I_P and I_N will themselves be mismatched. The average of the two currents is called the input bias currents,

And their difference is called the input offset current,

Errors Caused by I_B and I_OS

A straightforward way of assessing the effect of input currents is to find the output with all input signals set to zero.

By Ohm’s law, the voltage at the non-inverting inputs is V_P=-R_pI_P. Using the superposition principle, we have v_O=(1+R₂/R₁)V_P+R₂I_N=R₂I_N-(1+R₂/R₁)R_pI_P,or v_O=E_O, where,

This insightful form elicits a number of observations. First, in spite of the absence of any input signal, the circuit yields some output E_O. Second, the circuit produces E_O by taking an input error, or input dc noise and amplifying it by (1+R₂/R₁), which is aptly called the dc noise gain. Third, this input error consists of two terms, the voltage drop –R_pI_P due to I_P flowing through R_p, and the voltage drop (R₁║R₂). Fourth, the two terms tend to compensate for each other since they have opposite polarities.

INPUT OFFSET VOLTAGE

Shorting together the inputs of an op amp should yield v_O=a(v_P-v_N)=a×0=0V. However, because of inherent mismatches between the input-stage halves processing v_P and v_N, a practical op amp will generally yield v_O≠0. To force v_O to zero, a suitable correction voltage must be applied between the input pins. This shift is called the input offset voltage V_OS.

As in the case of I_OS, the magnitude and polarity of V_OS varies from one sample to another of the same op amp family. Depending on the family, V_OS may range from mV to µV. The 741 data sheets give the following room-temperature ratings for the 741C, V_OS=2 mV typical, 6 mV maximum. The OP-77 ultra-low offset voltage op amp has V_OS=10 µV typical, 50 µV maximum.

SLEW-RATE LIMITING

The rate at which v_O changes with time is highest at the beginning of the exponential transition. Using

We find dv_O/dt|t=0=V_m/τ. If we increase V_m, the rate at which the output slews will have to increase accordingly in order to compete the 10%-90% transition within the time t_R. In practice it is observed that above a certain step amplitude the output slope saturates at a constant value called the slew rate (SR). The output waveform, rather than an exponential curve, is now a ramp.

Slew-rate limiting is a non-linear effect that stems from the limited ability by the internal circuitry to charge or discharge the frequency–compensation capacitance C_c.

The SR is expressed in volts per µs. The data sheets give SR=0.5V/µs for the 741C op amp version and SR=0.7V/µs for the 741E version. This means that to complete a 10-V output swing, a 741C voltage follower takes approximately (10V)/(0.5V/µs)=20µs.

When the op amp is operated in the inverting mode, the slew rate during a positive going swing is usually the same as that during a negative-going swing. However, when operation is in the non-inverting mode, the common-mode input swing brings additional parasitic capacitances into play, which results in asymmetric SR values as well as other second-order effects such as discontinuities at the onset of the step.

BANDWIDTH:

Introduction

The small signal bandwidth represents the frequency at which the out put is 3db below its low frequency value. The full power bandwidth is the max freq at which the op amp will yield the largest possible amplitude.

For a sinusoidal signal the output would be